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  SST441NL/u441nl vishay siliconix new product document number: 72056 s-22526?rev. a, 17-feb-03 www.vishay.com 7-1 monolithic n-channel jfet duals product summary v gs(off) (v) v (br)gss min (v) g fs min (ms) i g typ (pa) | v gs1 - v gs2 | max (mv) - 1 to - 6 -25 4.5 -1 20 features benefits applications  anti latchup capability  monolithic design  high slew rate  low offset/drift voltage  low gate leakage: 1 pa  low noise  high cmrr: 90 db  external substrate bias?avoids latchup  tight differential match vs. current  improved op amp speed, settling time accuracy  high-speed performance  minimum input error/trimming requirement  insignificant signal loss/error voltage  high system sensitivity  minimum error with large input signal  wideband differential amps  high-speed, temp-compensated, single-ended input amps  high speed comparators  impedance converters description the SST441NL is a monolithic high-speed dual jfet mounted in a single so-8 package. this jfet is an excellent choice for use as wideband differential amplifiers in demanding test and measurement applications. pins 4 and 8 on the SST441NL and pin 4 on the u441nl part numbers enable the substrate to be connected to a positive, external bias (v dd ) to avoid latchup. the u441nl in the hermetically sealed to-78 package is available with full military processing. the so-8 package provides ease of manufacturing. the symmetrical pinout prevents improper orientation. the so-8 package is available with tape-and-reel options for compatibility with automatic assembly methods. to-78 top view u441nl g 1 s 1 d 1 g 2 d 2 s 2 1 2 3 7 6 4 s 1 substrate d 1 g 2 g 1 d 2 substrate s 2 narrow body soic 5 6 7 8 2 3 4 1 top view marking codes: SST441NL - 441nl 5 case, substrate absolute maximum ratings gate-drain, gate-source voltage -25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gate current 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead tempe rature ( 1 / 16 ? from case for 10 sec.) 300  c . . . . . . . . . . . . . . . . . . . storage temperature -55 to 150  c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating junction t emperature -55 to 150  c . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation : per side a 300 mw . . . . . . . . . . . . . . . . . . . . . . . . total b 500 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . notes a. derate 2.4 mw/  c above 25  c b. derate 4 mw/  c above 25  c for applications information see an102.
SST441NL/u441nl vishay siliconix new product www.vishay.com 7-2 document number: 72056 s-22526?rev. a, 17-feb-03 specifications (t a = 25  c unless otherwise noted) limits parameter symbol test conditions min typ a max unit static gate-source breakdown voltage v (br)gss i g = -1  a, v ds = 0 v -25 -35 v gate-source cutoff voltage v gs(off) v ds = 10 v, i d = 1 na -1 -3.5 -6 v saturation drain current b i dss v ds = 10 v, v gs = 0 v 6 15 30 ma gate reverse current i gss v gs = -15 v, v ds = 0 v -1 -500 pa gate reverse current i gss t a = 125  c -0.2 na gate operating current i g v dg = 10 v, i d = 5 ma -1 -500 pa gate operating current i g t a = 125  c -0.2 na gate-source forward voltage v gs(f) i g = 1 ma , v ds = 0 v 0.7 v dynamic common-source forward t ransconductance g fs v d s = 10 v, i d = 5 ma 4.5 6 9 ms common-source output conductance g os v ds = 10 v , i d = 5 ma f = 1 khz 20 200  s common-source forward t ransconductance g fs v d s = 10 v, i d = 5 ma 5.5 ms common-source output conductance g os v ds = 10 v , i d = 5 ma f = 100 mhz 30  s common-source input capacitance c iss v d s = 10 v, i d = 5 ma 3.5 pf common-source reverse transfer capacitance c rss v ds = 10 v , i d = 5 ma f = 1 mhz 1 pf equivalent input noise voltage e n v ds = 10 v, i d = 5 ma f = 10 khz 4 nv ? hz matching differential gate-source voltage | v gs1 ?v gs2 | v dg = 10 v, i d = 5 ma 7 20 mv gate-source voltage differential change with temperature  | v gs1 ?v gs2 |  t v dg = 10 v, i d = 5 ma t a = - 55 to 125  c 10  v/  c saturation drain current ratio c i dss1 i dss2 v ds = 10 v, v gs = 0 v 0.98 transconductance ratio c g fs1 g fs2 v ds = 10 v, i d = 5 ma f = 1 khz 0.98 common mode rejection ratio cmrr v dg = 10 to 15 v, i d = 5 ma 90 db notes a. typical values are for design aid only, not guaranteed nor subject to production testing. nnz b. pulse test: pw  300  s duty cycle  3%. c. assumes smaller value in the numerator.
SST441NL/u441nl vishay siliconix new product document number: 72056 s-22526?rev. a, 17-feb-03 www.vishay.com 7-3 typical characteristics (t a = 25  c unless otherwise noted) -0.1 pa -1 pa - 10 pa - 100 pa -1 na - 10 na - 100 na 015 10 52025 0-5 -4 -2 -1 15 13 11 7 5 25 20 15 10 5 0 drain current and transconductance vs. gate-source cutoff voltage gate leakage current v gs(off) - gate-source cutoff voltage (v) v dg - drain-gate voltage (v) i dss @ v ds = 10 v, v gs = 0 v g fs @ v dg = 10 v, v gs = 0 v f = 1 khz g fs i dss 9 -3 output characteristics v ds - drain-source voltage (v) v gs = 0 v -0.4 v -0.8 v -1.2 v -1.6 v -2.0 v -2.4 v -2.8 v 20 01216 8 420 15 10 5 0 v gs(off) = -4 v output characteristics v ds - drain-source voltage (v) 5 01 0.8 0.6 0.4 0.2 4 3 2 0 1 v gs(off) = -3 v v gs = 0 v output characteristics v ds - drain-source voltage (v) 10 01 0.8 0.6 0.4 0.2 8 6 4 0 2 v gs(off) = -4 v v gs = 0 v -0.4 v -0.8 v -1.2 v -1.6 v -2.0 v -2.4 v -2.8 v output characteristics v ds - drain-source voltage (v) 20 020 16 12 8 4 16 12 8 0 4 v gs(off) = -3 v v gs = 0 v -0.4 v -0.8 v -1.2 v -1.6 v -2.0 v 25 -1.4 v -1.6 v -0.2 v -0.4 v -0.6 v -0.8 v -1.0 v -1.2 v i gss @ 125  c i gss @ 25  c t a = 125  c t a = 25  c 5 ma 1 ma 100  a i g @ i d = 5 ma 1 ma 100  a g fs - forward transconductance (ms) i dss - saturation drain current (ma) i g - gate leakage i d - drain current (ma) i d - drain current (ma) i d - drain current (ma) i d - drain current (ma)
SST441NL/u441nl vishay siliconix new product www.vishay.com 7-4 document number: 72056 s-22526?rev. a, 17-feb-03 typical characteristics (t a = 25  c unless otherwise noted) transfer characteristics gate-source differential voltage vs. drain current voltage differential with temperature vs. drain current common mode rejection ratio vs. drain current (mv) v gs1 v gs2 - cmrr (db) v gs - gate-source voltage (v) i d - drain current (ma) i d - drain current (ma) i d - drain current (ma) i d - drain current (ma) t a = -55  c 125  c v gs(off) = -3 v v dg = 10 v  t a = 25 to 125  c  t a = - 55 to 25  c v dg = 10 v t a = 25  c  v dg = 10 - 20 v 5 - 10 v  v gs1 v gs2  v dg cmrr = 20 log v gs(off) = -3 v -4 v circuit voltage gain vs. drain current 20 0 -1.5 -1.0 -0.5 -2.0 -2.5 16 12 8 4 0 0.1 1 10 100 10 1 0.1 1 10 100 10 1 0.1 1 10 150 130 110 90 70 50 110 0.1 100 80 60 40 20 0 on-resistance vs. drain current i d - drain current (ma) 0.1 1.0 10 200 160 120 80 40 0 v gs(off) = -3 v -4 v a v  g fs r l 1  r l g os assume v dd = 15 v, v ds = 5 v r l  10 v i d v ds = 10 v 25  c v/  c () t    v gs1 v gs2 - r ds(on) - drain-source on-resistance ( ? ) i d - drain current (ma) a v - voltage gain
SST441NL/u441nl vishay siliconix new product document number: 72056 s-22526?rev. a, 17-feb-03 www.vishay.com 7-5 typical characteristics (t a = 25  c unless otherwise noted) 10 100 1 k 100 k 10 k v gs - gate-source voltage (v) common-source input capacitance vs. gate-source voltage - input capacitance (pf) c iss v ds = 0 v 15 v f = 1 mhz 10 0 -16 -20 -8 -4 8 6 4 2 0 5 v -12 common-source reverse feedback capacitance vs. gate-source voltage - reverse feedback capacitance (pf) c rss v gs - gate-source voltage (v) v ds = 0 v 15 v f = 1 mhz 5 0-20 -16 -8 -4 4 3 1 0 2 -12 output conductance vs. drain current i d - drain current (ma) t a = -55  c 125  c 50 40 30 20 10 0 0.1 1 10 25  c equivalent input noise voltage vs. frequency f - frequency (hz) v ds = 10 v i d @ 10 ma 20 16 12 8 4 0 v gs = 0 v common-source forward transconductance vs. drain current i d - drain current (ma) t a = -55  c 125  c 0.1 1 10 10 8 2 0 6 4 on-resistance and output conductance vs. gate-source cutoff voltage v gs(off) - gate-source cutoff voltage (v) r ds @ i d = 1 ma, v gs = 0 v g os @ v dg = 10 v, v gs = 0 v, f = khz r ds g os 250 0-3-5 -4 -2 -1 200 150 100 50 0 100 0 50 25  c v gs(off) = -3 v v ds = 10 v f = 1 khz v gs(off) = -3 v v ds = 10 v f = 1 khz 5 v s) g os - output conductance (  r ds(on) - drain-source on-resistance ( ? ) g os - output conductance ( s) g fs - forward transconductance (ms) e n - noise voltage nv / hz


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